1. Field of the Invention
The present invention relates to a salicide process, and more particular, to a salicide process utilizing a cluster ion implantation process.
2. Description of the Prior Art
Metal oxide semiconductor (MOS) transistors are key elements of current semiconductor products. A MOS transistor is formed with a gate, a source, and a drain. By providing a gate voltage larger than the threshold voltage of the MOS transistor, the drain and source will be conducted so as to meet the operation purpose of the MOS transistor. Therefore, the electrical performance of MOS transistors represents the quality of the MOS transistors.
As known in the art, silicide is a typical contact material used to reduce contact resistance of a MOS transistor. FIGS. 1-4 are schematic diagrams showing the typical silicide process. As shown in FIG. 1, a gate electrode 12 is formed on a substrate 10 with a gate insulating layer 14 interposed therebetween. Next, an ion implantation process, which decreases the thermal budget, is performed, to form source/drain extensions 16 (also called lightly doped drains, LDD) are formed in the substrate 10 of the two lateral sides of the gate electrode 12. Spacers 18 are formed around the gate electrode 12. Then, the gate electrode 12 and the spacers 18 are utilized as masks and an ion implantation process is processed to form the source/drain 20 in the substrate 10.
Subsequently, as shown in FIG. 2, a pre-amorphization implant (PAI) process 22 is carried out to form an amorphized layer 24 on in the substrate 10 near its surface. As shown in FIG. 3, a metal layer 26 is then sputtered onto the substrate 10. Finally, as shown in FIG. 4, a rapid thermal process (RTP) may be performed to react the metal layer 26 with the substrate 10 and the gate electrode 12 to form silicide layers 28. The un-reacted metal of the metal layer 26 is then removed from the surface of the substrate 10 by a wet etching process.
As known in the art, silicide such as titanium silicide (TiSi2) is a typical material used to reduce contact resistance. It is also known that TiSi2 exists as a C49 phase or as a C54 phase. When using the general processing conditions for forming TiSi2, the less desirable, higher-resistivity C49 phase is formed first. In order to obtain the lower-resistivity C54 phase, a second high-temperature annealing step is required. Besides, the titanium silicide process is flawed because each titanium atom consumes two silicon atoms to form the titanium silicide. To cope with the difficulties arose due to the use of titanium silicide, nickel (Ni) has been used to replace titanium in the silicide process. Therefore, currently, the metal layer 26 may be a nickel layer, thus the temperature of the RTP for producing the nickel silicide layer 28 can be lowered.
On the other hand, during the PAI process, a monomer ion beam method is utilized. Referring to FIG. 5, which is a schematic diagram of a traditional PAI method utilizing monomer ion beam method. The traditional monomer ion beam method transfers gas including germanium (Ge), argon (Ar) or indium (In) into a plasma device, trough an extractor and an accelerator, for producing a monomer ion beam implanted into the substrate 10. However, the amorphized layer 24 formed with the traditional PAI method has a deep depth, forming continuous amorphous layer and causing defects at the end of the range of implantation, which is called end-of-range (EOR) defect, as shown in FIG. 5. The EOR defect caused by the traditional monomer ion beam method cannot be recovered in the following low-temperature thermal process and will cause junction leak. Accordingly, the sequentially formed nickel silicide layer 28 will result in time-dependent dielectric breakdown (TDDB) fail because there is no enough thermal budget to recover. Furthermore, the nickel silicide layer 28 formed from the reaction of the metal layer 26 and the amorphized layer 24, formed with the traditional PAI method, is un-uniform so that spiking or piping effects are easily occurred.
In light of the above, there is still a need to provide an improved method to fabricate a MOS transistor with silicided source and drain with preferable performance.